pintest.v
//-- pintest.v
//-- Generated by HDLMAKER Rev 5.6.5, Sunday January 21 2001
//-- Engineer: B. Joshua Rosen
//-- Copyright (c) 2001 Polybus Systems Corp, Westford, MA
//-- The information contained in this file is confidential and proprietary.
//-- Any reproduction, use or disclosure, in whole or in part, of this
//-- program, including any attempt to obtain a human-readable version of this
//-- program, without the express, prior written consent of Polybus Systems Corp, Westford, MA
//-- is strictly prohibited.
module pintest(
clr_parity,
dump_data,
fb_io,
gblreset,
init,
init_val,
load_parity,
ram_d,
sample,
sel_parity,
sysclk
);
//-- IO Declarations
input clr_parity;
input [1:0] dump_data;
input [1:0] fb_io;
input gblreset;
input init;
input [1:0] init_val;
input [1:0] load_parity;
output ram_d;
input sample;
input sel_parity;
input sysclk;
//-- Signal Declarations
wire [1:0] ce;
wire [1:0] d;
wire [1:0] q;
//-- Component Instance delay128_1
delay128 delay128_1
(
.ce (ce[0]),
.d (d[0]),
.gblreset (gblreset),
.sysclk (sysclk),
.q (q[0])
);
//-- Component Instance delay128_2
delay128 delay128_2
(
.ce (ce[1]),
.d (d[1]),
.gblreset (gblreset),
.sysclk (sysclk),
.q (q[1])
);
//-- Component Instance listener_1
listener listener_1
(
.sysclk (sysclk),
.init (init),
.sample (sample),
.dump_data ({dump_data[1:0]}),
.fb_io ({fb_io[1:0]}),
.init_val ({init_val[1:0]}),
.clr_parity (clr_parity),
.q ({q[1:0]}),
.sel_parity (sel_parity),
.load_parity ({load_parity[1:0]}),
.d ({d[1:0]}),
.ce ({ce[1:0]}),
.ram_d (ram_d)
);
endmodule
HDLMaker Generated Files
pintest.job |
Synopsys script file |