cmp46.v



module 
cmp46(
      cmp_a,
      cmp_b,
      gblreset,
      probe,
      sysclk
      );

// Pin Definitions
input [45:0] cmp_a;
input [45:0] cmp_b;
input gblreset;
output [1:0] probe;
reg [1:0] probe;
input sysclk;

//Constants

//Signals
reg [45:0] acc;
reg notequal;

// Initialize Constant Values

// Begin code body 


always @(posedge sysclk or posedge gblreset)
begin
      
      if( gblreset == 1 )
      begin
            probe <= 2'b00;
            acc <= 46'b0000000000000000000000000000000000000000000000;
            notequal <= 1'b0;
      end
      else 
      begin
            acc <= cmp_a-cmp_b;
            if( acc  == 0)
            begin
                  notequal <= 1'b0;
            end
            else
            begin
                  notequal <= 1'b1;
            end
            
            if( notequal  == 1'b1)
            begin
                  probe <= 2'b11;
            end
            
      end
      
end

endmodule


HDLMaker Generated Files
cmp46.job Synopsys script file