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startup.vhd

---

library IEEE;
      use IEEE.std_logic_1164.all;
      use IEEE.std_logic_misc.all;
      use IEEE.std_logic_arith.all;

-- "$Header: /mnt/cvs/hdlmaker_lib/xc4000/vhd/startup.vhd,v 1.1.1.1 2000/10/04 19:59:18 bjrosen Exp $";

entity startup is
      port (

            GSR : in std_logic
      );
      end   startup ;


architecture BEHAVIOR of startup is


begin


end;

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HDLMaker Generated Files

startup.job

Synopsys script file

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