rstbuff.job
TOP = rstbuff
PART = "4013epq240-3"
read -format vhdl rstbuff.vhd
uniquify
current_design TOP
remove_constraint -all
compile -map_effort high
report_fpga > rstbuff.fpga
report_timing > rstbuff.timing
write -format db -hierarchy -output rstbuff.db
exit