array_pintest.prj
set_option -technology VIRTEX
set_option -part XCV800
set_option -package FG680
set_option -speed_grade -5
add_file -constraint array_pintest.sdc
set_option -fanout_limit 50
set_option -maxfan_hard false
set_option -frequency 40
set_option -symbolic_fsm_compiler 0
set_option -resource_sharing 1
set_option -pipe 1
add_file -verilog "virtex.v"
add_file -verilog "array_pintest_pads.v"
add_file -verilog "assign_num.v"
add_file -verilog "config_scan.v"
add_file -verilog "zeroone.v"
add_file -verilog "delay128.v"
add_file -verilog "listener.v"
add_file -verilog "pintest.v"
add_file -verilog "pintest_ctrl.v"
add_file -verilog "pintest_kernel.v"
add_file -verilog "rstbuff.v"
add_file -verilog "array_pintest.v"