FDC.v
// $Header: /mnt/cvs/hdlmaker_lib/xc4000/v/FDC.v,v 1.1.1.1 2000/10/04 19:59:15 bjrosen Exp $
/*
FUNCTION : D-FLIP-FLOP with async clear
*/
`timescale 100 ps / 10 ps
`celldefine
module FDC (Q, C, CLR, D);
parameter cds_action = "ignore";
parameter INIT = 1'b0;
output Q;
reg q_out;
input C, CLR, D;
tri0 GSR = glbl.GSR;
buf B1 (Q, q_out);
always @(GSR or CLR)
if (GSR)
assign q_out = INIT;
else if (CLR)
assign q_out = 0;
else
deassign q_out;
always @(posedge C)
q_out <= D;
specify
(posedge CLR => (Q +: 1'b0)) = (1, 1);
if (!CLR)
(posedge C => (Q +: D)) = (1, 1);
endspecify
endmodule
`endcelldefine
HDLMaker Generated Files
FDC.job |
Synopsys script file |